State of CAD and Engineering Workstation Technologies

Computer hardware is designed to guide software programs and it’s miles a not unusual but simplistic view that better spec hardware will allow all software program applications to perform better. Up till recently, the CPU became certainly the most effective device for computation of software applications. Other processors embedded in a PC or notebook have been committed to their parent gadgets including a graphics adapter card for display, a TCP-offloading card for network interfacing, and a RAID algorithm chip for hard disk redundancy or potential extension. However, the CPU is not the only processor for software program computation. We will provide an explanation for this in the next segment.

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Legacy software program applications still rely upon the CPU to do the computation. That is, the commonplace view is valid for software program applications which have not taken advantage of other types of processors for computation. We have completed some benchmarking and agree with that packages like Maya 03 are CPU intensive.

Legacy software was now not designed to be parallel processed. Therefore we will take a look at carefully with the software dealer in this difficulty earlier than watching for multiple-center CPUs to supply higher performance. Irrespectively, we will obtain a higher output from executing more than one incidences of the identical software but this isn’t similar to multi-threading of an unmarried utility.

ECC is Error Code Detection and Correction. A reminiscence module transmits in words of 64 bits. ECC reminiscence modules have incorporated electronic circuits to locate a single bit blunders and accurate it, however, aren’t able to rectify bits of blunders going on in the equal phrase. Non-ECC reminiscence modules do not test in any respect – the system continues to paintings except chunk mistakes violates pre-defined guidelines for processing. How regularly do unmarried bit mistakes arise nowadays? How unfavorable might an unmarried bit mistakes be? Let us see this quotation from Wikipedia in May 2011, “Recent tests provide extensively various error rates with over 7 orders of value distinction, ranging from 10−10−10−17 errors/bit-hour, roughly one bit errors in line with hour in step with gigabyte of memory to 1 bit error per century in step with gigabyte of memory.”

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The GPU has now been developed to gain the prefix of GP for General Purpose. To be exact, GPGPU stands for General Purpose computation on Graphics Processing Units. A GPU has many cores that may be used to boost up an extensive variety of applications. According to GPGPU.Org, which is a central aid of GPGPU news and records, developers who port their programs to GPU regularly reap speedups of orders of significance in comparison to optimized CPU implementations.

Many software program applications had been up to date to capitalize at the newfound potentials of GPU. CATIA 03, Insight 04 and Solidworks 02 are examples of such applications. As a result, those programs are some distance extra touchy to GPU assets than CPU. That is, to run such packages optimally, we have to invest in GPU as opposed to CPU for a CEW. According to its personal website, the brand new Abaqus product suite from SIMULIA – a Dassault Systemes brand – leverages GPU to run CAE simulations twice as speedy as conventional CPU.

Nvidia has launched 6 member playing cards of the brand new Quadro Fermi own family via April 2011, in ascending series of electricity and price: 400, six hundred, 2000, 4000, 5000 and 6000. According to Nvidia, Fermi promises up to 6 times the overall performance in a tessellation of the preceding family known as Quadro FX. We shall equip our CEW with Fermi to acquire the finest rate/performance combinations.

According to Wikipedia, CUDA (Compute Unified Device Architecture) is a parallel computing structure developed via Nvidia. CUDA is the computing engine in Nvidia GPU reachable to software developers thru versions of industry-well-known programming languages. For example, programmers use C for CUDA (C with Nvidia extensions and positive restrictions) compiled via a PathScale Open64 C compiler to code algorithms for execution on the GPU. (The brand new stable version is three.2 launched in September 2010 to software program builders.)

The GPGPU internet site has a preview of an interview with John Humphrey of EM Photonics, a pioneer in GPU computing and developer of the CUDA-improved linear algebra library. Here is an extract of the preview: “CUDA allows for very direct expression of exactly how you need the GPU to perform a given unit of work. Ten years ago I become doing FPGA paintings, where the superb promise turned into the automated conversion of excessive level languages to hardware good judgment. Needless to say, the huge abstraction supposed the end result wasn’t desirable.”

Bulk storage is an essential part of a CEW for processing in actual time and archiving for later retrieval. Hard disks with SATA interface have become bigger in garage length and less expensive in hardware cost over time, however no longer getting faster in overall performance or smaller in physical size. To get faster and smaller, we have to select difficult disks with SAS interfaces, with a chief compromise on storage length and hardware price.

RAID has been around for many years for offering redundancy, increasing the dimensions of quantity to nicely beyond the confines of 1 physical difficult disk, and expediting the speed of sequential reading and writing, especially random writing. We can installation SAS RAID to deal with the huge garage length problem but the hardware rate will go up similarly.

SSD has grown to become up recently as a shiny star on the horizon. It has no longer replaced HDD due to its high price, barriers of NAND reminiscence for durability, and immaturity of controller generation. However, it has discovered an area lately as a RAID Cache for two critical benefits not conceivable with different means. The first is a higher speed of random read. The 2d is a low-value factor while used alongside SATA HDD.

Intel has launched Sandy Bridge CPU and chipsets which might be strong and malicious program free in view that March 2011. System computation performance is over 20% higher than the previous era called Westmere. The pinnacle CPU version has four variations which might be officially able to over-clock to over 4GHz as long as the CPU strength consumption is inside the designed restriction for thermal attention, referred to as TDP (Thermal Design Power). The 6-center version with legit over-clocking will come out in June 2011 time frame.

Lee Hogan

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